Complete ASIC Design Flow

How Chips are Built?

A few weeks back a friend of mine asked me if I could quickly explain important steps taken in building the chip - from Marketing idea to final tapeout. Interestingly, I couldn't explain to him very clearly at that moment, nonetheless, that did prompt me to compile related info all at one place.

ASIC Design Flow - Concept to Tapeout

There are about 12 major steps: starting with Marketing requirements to Tapeout when the chip layout database is shipped to chip foundaries like Global, TSMC, UMC.

1. Marketing Requirements: Marketing team often researches -- interacting with customers and analyzing competition -- and compiles product specifications like performance goals; cost, power budgets; and schedule.
2. Architecture: Chip Architects perform feasibility analysis, and define a higher level architecture that fits marketing specs. The Architecture is then reviewed with Marketing and other stakeholders. If agreed, Architects/Designers develop implementation level plan, often termed as detailed or micro architecture.
3. RTL Design: Chip Architects perform feasibility analysis, and define a higher level architecture that fits marketing specs. The Architecture is then reviewed with Marketing and other stakeholders. If agreed, Architects/Designers develop implementation level plan, often termed as detailed or micro architecture.
4. RTL to Gates Synthesis: Chip Architects perform feasibility analysis, and define a higher level architecture that fits marketing specs. The Architecture is then reviewed with Marketing and other stakeholders. If agreed, Architects/Designers develop implementation level plan, often termed as detailed or micro architecture.